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? semiconductor components industries, llc, 2001 may, 2001 rev. 5 1 publication order number: mc33349/d mc33349 lithium battery protection circuit for one cell battery packs the mc33349 is a monolithic lithium battery protection circuit that is designed to enhance the useful operating life of a one cell rechargeable battery pack. cell protection features consist of internally trimmed charge and discharge voltage limits, discharge current limit detection, and a low current standby mode when the cell is discharged. this protection circuit requires a minimum number of external components and is targeted for inclusion within the battery pack. ? internally trimmed charge and discharge voltage limits ? discharge current limit detection ? low current standby mode when cells are discharged ? dedicated for one cell applications ? minimum components for inclusion within the battery pack ? available in a low profile surface mount package figure 1. typical one cell smart battery pack 132 5 6 4 mc33349 http://onsemi.com sot23 n suffix case 1262 6 1 16 4 2 3 (top view) do p co gnd c t pin connections 5 v cell see detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet. ordering information v = version code number xx = date code marking diagram avxx
mc33349 http://onsemi.com 2 maximum ratings rating symbol value unit supply voltage (pin 5 to pin 6) v dd 0.3 to 12 v input voltage p pin voltage (pin 5 to pin 2) v p v dd 28 to v dd + 0.3 v ct pin (pin 4 to pin 6) v ct gnd 0.3 to v dd + 0.3 v output voltage co pin voltage (pin 3 to pin 2) v co v dd 28 to v dd + 0.3 v do pin voltage (pin 1 to pin 6) v do gnd 0.3 to v dd + 0.3 v power dissipation p d 150 mw operating junction temperature t j 40 to 85 c storage temperature t stg 55 to 125 c electrical characteristics (c t = 0.01 m f, t a = 25 c, for min/max values t a is the operating junction temperature range that applies, unless otherwise noted.) characteristic symbol min typ max unit note 1 voltage sensing cell charging cutoff (pin 5 to pin 6) overvoltage threshold, v dd increasing v det1 b 3, 4 suffix 4.2 4.25 4.3 v 7 suffix 4.3 4.35 4.4 v overvoltage hysteresis v dd decreasing v hys1 150 200 250 mv b cell discharging cutoff (pin 5 to pin 6) c undervoltage threshold, v dd decreasing v det2 2.437 2.5 2.563 v overvoltage delay time (c t = 0.01 m f, v dd = 3.6 v to 4.5 v) t (det1) 55 80 105 ms b undervoltage delay time (v dd = 3.6 v to 2.4 v) t (det2) 7.0 10 13 ms c current sensing excess current threshold (detect rising edge of p pin voltage) v det3 d 3, 7 suffix 170 200 230 mv 4 suffix 45 75 105 mv short protection voltage (v dd = 3.0 v) v short v dd 1.1 v dd 0.8 v dd 0.5 v d current limit delay time (v dd = 3.0 v) t (det3) 9.0 13 17 ms d t (short) 5.0 50 m s d reset resistance for short protection r short 50 100 150 k d outputs co nch on voltage (i o = 50 m a, v dd = 4.4 v) v ol1 0.2 0.5 v e co pch on voltage (i o = 50 m a, v dd = 3.9 v) v oh1 3.4 3.8 v f do nch on voltage (i o = 50 m a, v dd = 2.4 v) v ol2 0.2 0.5 v g do pch on voltage (i o = 50 m a, v dd = 3.9 v) v oh2 3.4 3.7 v h total device operating input voltage v dd 1.5 10 v a supply current i cell operating (v dd = 3.9 v, v p = 0 v) 3.0 6.0 m a i standby (v dd = 2.0 v) 0.3 0.6 m a i minimum operating cell voltage for zero volt charging (pin 5 to pin 2) v st 1.2 v a 1. indicates test circuits shown on next page.
mc33349 http://onsemi.com 3 5 2 6 1 3 5 2 6 3 4 5 2 6 1 5 2 6 1 5 2 6 1 5 2 6 3 5 2 6 1 5 2 6 a a a a v v v v v v v v a oscilloscope a b c d e f g h i figure 2. test circuit schematics 5 2 6 3 a v
mc33349 http://onsemi.com 4 figure 3. detailed block diagram level shift short circuit detector 1 3 2 6 5 4 delay rshort 10 kohm vd3 vd2 vd1 vcell ct gnd do co p- pin function description pin symbol description 1 do this output connects to the gate of the discharge mosfet allowing it to enable or disable battery pack discharging. 2 p this pin monitors cell discharge current. the excess current detector sets when the combined voltage drop of the charge mosfet and the discharge mosfet exceeds the discharge current limit threshold voltage, v (det3) . the short circuit detector activates when v (p) is pulled within 0.8v of the cell voltage by a short circuit. 3 co this output connects to the gate of the charge mosfet allowing it to enable or disable battery pack charging. 4 c t this pin connects to the external capacitor for setting the output delay of the overvoltage detector (vd1). 5 v cell this input connects to the positive terminal of the cell for voltage monitoring and provides operating bias for the integrated circuit. 6 gnd this is the ground pin of the ic.
mc33349 http://onsemi.com 5 typical characteristics figure 4. overvoltage threshold vs temperature mc33349n3x t a , ambient temperature ( c) figure 5. undervoltage threshold vs temperature mc33349n3x / mc33349n7x det1 overvoltage threshold v (v) 4.26 4.25 4.22 4.21 4.20 -40 -20 0 20 40 60 80 100 -60 4.23 4.24 4.27 t a , ambient temperature ( c) det2 undervoltage threshold v (v) figure 6. excess current threshold vs temperature mc33349n3x / mc33349n7x t a , ambient temperature ( c) figure 7. short protection voltage vs temperature mc33349n3x det3 excess current threshold v (v) 0.210 0.205 0.195 0.190 -40 -20 0 20 40 60 80 100 -60 0.200 t a , ambient temperature ( c) 2.40 2.35 2.20 2.15 2.10 -40 -20 0 20 40 60 80 100 v dd = 3.0 v -60 2.25 2.30 short short protection voltage v (v) figure 8. output delay of overvoltage vs temperature mc33349n3x t a , ambient temperature ( c) figure 9. output delay of undervoltage vs temperature mc33349n3x / mc33349n7x vdet1 output delay of overvoltage 100 80 70 40 30 20 -40 -20 0 20 40 60 80 100 c3 = 0.01 m f v dd = 3.6v to 4.3v -60 50 60 90 2.53 2.52 2.49 2.48 2.47 -40 -20 0 20 40 60 80 100 -60 2.50 2.51 2.54 t (ms) t a , ambient temperature ( c) vdet2 output delay of undervoltage 18 14 12 6 4 2 -40 -20 0 20 40 60 80 100 v dd = 3.6v to 2.4v -60 8 10 16 t (ms)
mc33349 http://onsemi.com 6 figure 10. output delay of excess current vs temperature mc33349n3x figure 11. output delay of short circuit detector vs temperature mc33349n3x figure 12. overvoltage threshold hysteresis vs temperature mc33349n3x / mc33349n7x t a , ambient temperature ( c) figure 13. operating current vs temperature mc33349n3x hys1 over-charge threshold hysteresis v (mv) 0.210 0.205 0.195 0.190 -40 -20 0 20 40 60 80 100 -60 0.200 t a , ambient temperature ( c) 4.0 3.0 2.5 1.0 0.5 0.0 -40 -20 0 20 40 60 80 100 v dd = 3.9 v v p- = 0 v -60 1.5 2.0 3.5 t a , ambient temperature ( c) vdet3 output delay of excess current 16 12 10 4 2 0 -40 -20 0 20 40 60 80 100 v dd = 3.0 v -60 6 8 14 t (ms) t a , ambient temperature ( c) output delay of short circuit 10 4 2 0 -40 -20 0 20 40 60 80 100 -60 6 8 detector tshort ( s) m 18 20 v dd = 3.0 v figure 14. standby current vs temperature mc33349n3x t a , ambient temperature ( c) figure 15. cout nch driver on voltage (vol1) vs temperature mc33349n3x 0.40 0.30 0.25 0.10 0.05 0.00 -40 -20 0 20 40 60 80 100 -60 0.15 0.20 0.35 t a , ambient temperature ( c) 0.30 0.25 0.10 0.05 0.00 -40 -20 0 20 40 60 80 100 i ol = 50 m a v dd = 4.4v -60 0.15 0.20 ol1 cout nch driver on voltage v (v) v dd = 2.0 v operating current icell ( a) m standby current icell ( a) m
mc33349 http://onsemi.com 7 figure 16. cout pch driver on voltage (voh1) vs temperature mc33349n3x figure 17. dout nch driver on voltage (vol2) vs temperature mc33349n3x figure 18. dout pch driver on voltage (voh2) vs temperature mc33349n3x figure 19. short protection delay time vs capacitance c2 mc33349n3x figure 20. excess current delay time vs v dd mc33349n3x supply voltage v dd (v) 25.00 10.00 5.00 0.00 3.0 3.5 4.0 4.5 2.5 15.00 20.00 t a , ambient temperature ( c) 3.90 3.85 3.70 3.65 3.60 -40 -20 0 20 40 60 80 100 i oh = -50 m a v dd = 3.9v -60 3.75 3.80 oh1 cout pch driver on voltage v (v) t a , ambient temperature ( c) 0.30 0.25 0.10 0.05 0.00 -40 -20 0 20 40 60 80 100 i ol = 50 m a v dd = 2.4v -60 0.15 0.20 ol2 dout nch driver on voltage v (v) t a , ambient temperature ( c) 3.90 3.85 3.70 3.65 3.60 -40 -20 0 20 40 60 80 100 -60 3.75 3.80 oh2 dout pch driver on voltage v (v) external capacitance c2 ( m f) 10000 1000 10 0 0.01 1 0.001 100 r2 = 1k v dd = 3.0v short output delay of short protection t ( s) 0.1 m i oh = -50 m a v dd = 3.9v vdet3 output delay of excess current t (ms)
mc33349 http://onsemi.com 8 figure 21. excess current threshold vs external resistance r2 mc33349n3x / mc33349n7x figure 22. overvoltage threshold vs external resistance r1 mc33349n3x external resistance r2(k ) 0.208 0.207 0.204 0.203 0.202 0.5 1 1.5 2 2.5 3 v dd = 3.0v 0 0.205 0.206 external resistance r1( ) 4.258 4.256 4.250 4.248 4.246 0 200 400 600 800 1000 c1 = 0 to 0.68 m f 4.252 4.254 0.209 0.210 det3 excess current threshold v (v ) det1 overvoltage threshold v (v) c3 = 0.22 m f c3 = 0.01 m f c3 = 0.1 m f operating description vd1 / overcharge detector vd1 monitors the voltage at the v cell pin (v dd ). when it exceeds the overcharge detector threshold, v det1 . vd1 senses an overcharging condition, the co pin goes to a alowo level, and the external charge control, nchmosfet turns off. resetting vd1 allows resumption of the charging process. vd1 resets under two conditions, thus, making the co pin level ahigh.o the first case occurs when the cell voltage drops below av det1 v hys1 .o (v hys1 is typically 200 mv). in the second case, disconnecting the charger from the battery pack can reset vd1 after v dd drops between av det1 o and av det1 v hys1 o. after detecting overcharge, connecting a load to the battery pack allows load current to flow through the parasitic diode of the external charge control fet. the co level goes ahigho when the cell voltage drops below v det1 due to load current draw through the parasitic diode. an external capacitor connected between the gnd pin and ct pin sets the output delay time for overcharge detection. the external capacitor sets up a delay time from the moment of overcharge detection to the time co outputs a signal, which enables the charge control fet to turn off. if the voltage fault occurs within the time delay window. co will not turn off the charge control fet. the output delay time can be calculated as follows: t vdet1 [sec] (ct[f] (vdd[v] 0.7) (0.48 10 6 ) a level shifter incorporated in a buffer driver for the co pin drives the alowo level of co pin to the p pin voltage. a cmos buffer sets the ahigho level of co pin to v dd . vd2 / overdischarge detector vd2 monitors the voltage at the v cell pin (v dd) . when it drops below the overdischarge detector threshold, v det2 , vd2 senses an overdischarge condition, the do pin goes to a alowo level, and the external discharge control nch mosfet turns off. the ic enters a low current standby mode after detection of an overdischarged voltage by vd2. supply current then reduces to approximately 0.3 m a. during standby mode, only the charger detector operates. vd2 can only reset after connecting the pack to a charger. while v dd remains under the overdischarge detector threshold, v det2 , discharge current can flow through the parasitic diode of the external discharge control fet. the do level goes ahigho when the cell voltage rises above v det2 due to the charging current through the parasitic diode. connecting a charger to the battery pack will instantly set do ahigho if this causes v dd to rise above v det2 . when cell voltage equals zero, one can charge the battery pack if the voltage is greater than the minimum charge voltage, v st . output delay time for the overdischarge detection (t vdet2 ) is fixed internally. if the voltage fault occurs within the time delay window, do will not turn off the discharge control fet. a cmos buffer sets the output of the do pin to a ahigho level of v dd and a alowo level of gnd. vd3 / excess current detector, short circuit detector both the excess current detector and the short circuit detector can work when the two control fet's are on. when the voltage at the p pin rises to a value between the short circuit protection voltage, v short , and the excess current threshold, v det3 , the excess current detector operates. increasing v (p) higher than v short enables the short circuit detector. the do pin then goes to a alowo level, and the external discharge control nch mosfet turns off. output delay time for excess current detection (t vdet3 ) is fixed internally. if the excess current fault occurs within the time delay window, do will not turn off the discharge control fet. however, when the short circuit protector is
mc33349 http://onsemi.com 9 enabled, do can turn off the discharge control fet. its delay time would be approximately 5 m s. the ppin has a builtin pull down resistor, typically 100 k , which connects to the gnd pin. once an excess current or short circuit fault is removed, the internal resistor pulls v (p) to the gnd pin potential. therefore, the voltage from p to gnd drops below the current detection thresholds and do turns the external mosfet back on. note if v dd voltage is higher than the overdischarge voltage threshold, v det2 , when excess current is detected the ic will not enter a standby mode. however, if v dd is below v det2 when excess current is detected, the ic will enter a standby mode. this will not occur when the short circuit detector activates. figure 23. timing diagram / operational description
mc33349 http://onsemi.com 10 figure 24. typical application circuit 5 2 6 1 + - 3 4 c1 0.1 m f c3 0.01 m f c2 0.22 m f r1 100 r2 1.0 k mc33349 technical notes r1 and c1 will stabilize a supply voltage to the mc33349. a recommended r1 value is less than 1 k . a larger value of r1 leads to higher detection voltage because of shoot through current into the ic. r2 and c2 stabilize p pin voltage. larger r2 values could possibly disable reset from overdischarge by connecting a charger. recommended values are less than 1 k . after an overcharge detection even connecting a battery pack to a system could probably not allow a system to draw load current if one uses a larger r2c2 time constant. the recommended c2 value is less than 1 m f. r1 and r2 can operate as a current limiter against setting cell reverse direction or for applying excess charging voltage to th e ic and battery pack. smaller r1 and r2 values may cause excessive power consumption over the specified power dissipation rating. therefore r1+r2 should be more than 1 k . the time constants r1c1 and r2c2 must have a relation as follows: r1c1 r2c2 if the r1c1 time constant for the vcell pin is larger than the r2c2 time constant for the p pin, the ic might enter a standby mode after detecting excess current. this was noted in the operating description of the current detectors.
mc33349 http://onsemi.com 11 ordering information device overvoltage threshold (v) undervoltage threshold (v) current limit threshold (v) marking reel size tape width quantity mc33349n3r1 4.25 2.5 0.2 a1xx* mc33349n4r1 4.25 2.5 0.075 a2xx* 7 8 mm 3000 mc33349n7r1 4.35 2.5 0.2 a0xx* * xx denotes the date code marking. consult factory for information on other threshold values.
mc33349 http://onsemi.com 12 package dimensions sot23 n suffix plastic package case 126201 issue a dim min max millimeters a 0.90 1.45 a1 0.00 0.15 b 0.35 0.50 b1 0.35 0.45 c 0.09 0.20 c1 0.09 0.15 d 2.80 3.00 e 2.60 3.00 e1 1.50 1.75 e 0.95 e1 1.90 l 0.25 0.55 0 10 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimension d does not include flash or protrusions. flash or protrusions shall not exceed 0.23 per side. 4. terminal numbers are shown for reference only. 5. dimensions d and e1 are to be determined at datum plane h. c e d b e1 1 2 3 6 5 4 pin 1 identifier a a a b e1 e m 0.20 c m b 0.05 c m 0.10 c s a a1 a s b h l ???? ???? c1 b1 b section aa on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com tollfree from mexico: dial 018002882872 for access then dial 8662979322 asia/pacific : ldc for on semiconductor asia support phone : 13036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc33349/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk, ireland

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